First experience with the scalable coherent interface
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چکیده
منابع مشابه
First Experience with the Scalable Coherent Interface
The research project RD24 [11] is studying applications of the Scalable Coherent Interface (IEEE-1596) standard for the large hadron collider (LHC). First SCI node chips from Dolphin were used to demonstrate the use and functioning of SCI’s packet protocols and to measure data rates. We present results from a first, two-node SCI ringlet at CERN, based on a R3000 RISC processor node and DMA node...
متن کاملLocal-Area MultiProcessor: the Scalable Coherent Interface
The economic incentive is now so compelling that users are beginning to make the transition to parallel processing, perhaps with only the expectation that they will learn how to adapt their programs to these new machines over time. Both software and hardware technology have made advances that tend to encourage these expectations. Several directions have been explored: Symmetric MultiProcessors ...
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IEEE P1596, the Scalable Coherent Interface (formerly known as SuperBus) is based on experience gained while developing Fastbus (ANSI/IEEE 960-1986, IEC 935), Futurebus (IEEE P896.x) and other modern high-performance buses. SC1 goals include a minimum bandwidth of 1 GByte/sec per processor in multiprocessor systems with thousands of processors; efficient support of a coherent distributed-cache ...
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ژورنال
عنوان ژورنال: IEEE Transactions on Nuclear Science
سال: 1994
ISSN: 0018-9499,1558-1578
DOI: 10.1109/23.281471